Author(s):
Sanjay Kumar, A.S. Zadgaonkar, S. Tiwari
Email(s):
Email ID Not Available
Address:
Deptat. of computer Science and Engg., Raipur lnstt. of Tech., Raipur (C.G.)-492001
Deptt. of Electrical Engg. Raipur Engg. College, Raipur (C.G.)-492010
Deptt of Electronics M.N.R. Engineering College, Allahabad (U.P.)-211004.
Published In:
Volume - 13,
Issue - 1,
Year - 2000
Cite this article:
Kumar, Zadgaonkar and Tiwari (2000). A Better Scheme Of Interconnection In Supercomputers. Journal of Ravishankar University (Part-B: Science), 13(1), pp.20-29.
Journal of Ravishankar University Vol.13 No. B (Science) 2000 pp 20-29 ISSN 0970 5910
A Better Scheme Of Interconnection In Supercomputers
Sanjay Kumar, *A.S. Zadgaonkar and **S. Tiwari,
Deptat. of computer Science
and Engg., Raipur lnstt. of Tech., Raipur (C.G.)-492001.
*Deptt. of Electrical
Engg. Raipur Engg. College, Raipur (C.G.)-492010.
**Deptt of Electronics
M.N.R. Engineering College,
Allahabad (U.P.)-211004
Ms : Received : 14/8/2000, Revised: 25/11/2000, Aceepted: 19/1/2001
Abstract : Performance of parallel computer largely depends upon the
performance of multiprocessor and performance of multiprocessor is governed by the performance of multistage interconnection network. In this
paper a new architecture of Multistage Interconnection Network i~ being
simulated which is more
reliable, fault tolerant, easily
repairable and is still more cost
effective.
Keywords : Througput, delay, Multistage lnterconnetcion Network.
NOTE: Full version
of this manuscript is available in PDF.